DM544: Computer Architecture (5 ECTS)

STADS: 15013501

Level
Bachelor course

Teaching period
The course is offered in the autumn semester.

Teacher responsible
Email: roettger@imada.sdu.dk

Timetable
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Comment:
Ubegrænset deltagerantal. Fælles undervisning med DM548 Computerarkitektur (10 ECTS)

Prerequisites:
None

Academic preconditions:
The contents of DM536 Introduction to Programming and DM537 Object-oriented  Programming must be known. The course cannot be followed if you have passed DM548, or if you have DM548 mandatory in your curriculum.

Course introduction
To introduce the student to the architecture of general purpose computers, from the logic level over the microprogram level to the conventional ISA level. Also major components in the storage hierarchy, bus architectures and the organization of pipelined CPU's.

Qualifications
The student will obtain insight into the organization of modern computers and their CPU's, so as to be able to compare and evaluate their performance on a level independent of technology. More specifically: - to understand basic logic diagrams, and to express the functionality of basic CPU components in terms of such. Specifically to be able to express recursive definitions to minimize longest paths.

• to express the functionality of an ISA level instruction by interpretation on an underlying (micro)architecture.
• to be able to interpret ordinary binary integer and floating point number representations, and to be able to convert between these.
• to know and be able to explain the properties and limitations of the different storage components, including their addressing, and to evaluate the performance of a multi-level storage hierarchy.
• to be able to explain and discuss the exploitation of parallelism in the form of pipelining, the limitations of such, and the distribution of tasks on multiple functional units.
• to be able to explain and discuss the internal organization and internal communication paths at a high level, including communication with external units and interrupts from these.
• to express the functionality of a given algorithm as an assembler program, including to bring such a program to execution on a specific machine.

Expected learning outcome


Subject overview
The digital logic level and microprogram level including pipelining, cache memories and other performance improving facilities. The ISA level instruction types, -formats and addressing methods, datatypes and number representations, assembler programming and virtual memories.

Literature

Meddeles ved kursets start.

Website
This course uses e-learn (blackboard).

Prerequisites for participating in the exam
One mandatory project. The project must be passed to in order to take the oral exam. (15013512)

Assessment and marking:
Oral exam with marks according to the 7-point grading scale, external examiner. (15013502)

Reexamination in the same exam period or immediately thereafter.

Expected working hours
The teaching method is based on three phase model.
Intro phase: 21 hours
Skills training phase: 21 hours

Educational activities Study phase: 21 hours

Language
This course is taught in Danish or English, depending on the lecturer. However, if international students participate, the teaching language will always be English.

Course enrollment
See deadline of enrolment.

Tuition fees for single courses
See fees for single courses.