DM548: Computer architecture and system programming (10 ECTS)

STADS: 15015001

Level
Bachelor course

Teaching period
The course is offered in the autumn semester.

Teacher responsible
Email: roettger@imada.sdu.dk

Timetable
Group Type Day Time Classroom Weeks Comment
Common I Tuesday 16-18 U155 36-41,43-51
Common I Thursday 12-13 U51 40
Common I Friday 14-15 U52 36-39,41,43-51
H1 TE Wednesday 08-10 U131 36,38,40,43
H1 TE Wednesday 08-10 U105 45,47,49
H1 TL Thursday 12-14 IMADA Terminalrum 37,39,41,44,46,48,50
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Comment:
Ubegrænset deltagerantal. Fælles undervisning med DM544 Computerarkitektur

Prerequisites:
None

Academic preconditions:
The content of DM536 Introduction to Programming should be known.The course cannot be followed if you have passed DM544, or if you have DM544 mandatory in your curriculum.

Course introduction
The course introduces the student to the architecture of general purpose computers, from the logic level over the microprogramming level to the conventional ISA level; also major components in the storage hierarchy, bus architectures and the organization of pipelined CPU's are presented. In addition, the main aspects of a system programming language are introduced.

Qualifications
The student will obtain insight into the organization of modern computers and their CPU's, in order to be able to compare and evaluate their performance on a level independent of the specific technology. More specifically the course provide the following competences:

  • to understand basic logic diagrams, and to express the functionality of basic CPU components in terms of such diagrams.
  • to express the functionality of an ISA level instruction by interpretation on an underlying (micro)architecture.
  • to be able to interpret ordinary binary integer and floating point number representations, and to be able to convert between these.
  • to know and be able to explain the properties and limitations of the different storage components, including their addressing, and to evaluate the performance of a multi-level storage hierarchy.
  • to be able to explain and discuss the exploitation of parallelism in the form of pipelining, their limitations, and the distribution of tasks on multiple functional units.
  • to be able to explain and discuss the internal organization and internal communication paths at a high level, including communication with external units and interrupts from these.
  • to express the functionality of a given algorithm as an assembler program, including to bring such a program to execution on a specific machine.
  • to express the functionality of a given algorithm as a system program, including to bring such a program to execution on a specific machine.
Expected learning outcome
At the end of the course, the student should be able to:

  • interpret elementary logic diagrams and truth tables, as well as demonstrating the functionality of the basic CPU components in form of such diagrams and tables, especially to take advantage of recursive definitions to minimize the longest path.
  • express the functionality of an ISA level instruction in the interpretation of an underlying (micro) machine architecture.
  • interpret ordinary binary integer and floating point representations, and to convert between these.
  • explain the characteristics and limitations of the different storage components, including the addressing structure, and assess the performance of a multi-level storage hierarchy.
  • explain and discuss modern CPUs internal use of parallelism in the form of pipelining, restricting use and distribution of tasks on multiple functional units.
  • explain and discuss the internal organization and internal communication paths at a high level, including communication with external devices as well as interruptions from these.
  • to express the functionality of a given algorithm as an assembler program, including to bring such a program to execution on a specific machine.
  • to express the functionality of a given algorithm as a system program, including to bring such a program to execution on a specific machine.
Subject overview
The digital logic level and microprogramming level, including pipelining, cache memories and other performance improving features. The ISA level instruction types, formats and addressing methods, data types and number representations, assembler programming and virtual memories. A system programming language, including: variables and operators, functions, pointers, recursion, I/O, and basic data structures.

Literature
  • Meddeles ved kursets start.: .


Website
This course uses e-learn (blackboard).

Prerequisites for participating in the exam
A few mandatory projects. The projects must be passed in order to take the written exam. (15015012)

Assessment and marking:
  1. Written exam. Evaluated by external censorship by the danish 7 mark scale (10 ECTS). (15015002)
Expected working hours
The teaching method is based on three phase model.
Intro phase: 42 hours
Skills training phase: 28 hours

Educational activities Study phase: 32 hours

Language
This course is taught in English.

Course enrollment
See deadline of enrolment.

Tuition fees for single courses
See fees for single courses.